Multiplexers: Types, Functionality, and Applications
Overview: This article explores multiplexers, detailing their definitions, types, design techniques, and applications in digital circuits for data selection and signal processing.
Quantum-dot cellular automata (QCA) is an emerging nanotechnology that offers a promising alternative to traditional complementary metal-oxide-semiconductor (CMOS) circuits, particularly for designing digital logic components at extremely small scales. Multiplexers are one of the fundamental building blocks in QCA-based digital circuits.
What is a multiplexer?
A multiplexer, often called a MUX, is a combinational circuit with multiple input lines and a single output line. It also includes selection lines, determining which input is connected to the output at any given time. They are also known as data selectors because they select one output from several inputs. As shown in Fig. 1, multiplexers are commonly used to convert parallel data lines into a serial data line, enabling efficient data transmission.
Fig. 1 Diagrammatic illustration of the multiplexer. Source: Rakesh Kumar, Ph.D.
For a multiplexer with N selection lines, the number of inputs (m) equals 2 to the power of N. So the relationship between selection lines (N) and input lines (m) is defined by the equation
m=
In any multiplexer circuit, the output is determined by the input signals and the specific combination of selection lines. Multiplexers of different sizes can be designed by varying the number of selection lines (n). The number of selection lines is defined by the equation
N= 
Types
MUXs are classified based on the number of data inputs and selection lines. The most common types are
● 2:1 Multiplexer
● 4:1 Multiplexer
● 8:1 Multiplexer
● 16:1 Multiplexer
2:1 Multiplexer
A 2:1 multiplexer is a digital circuit with two data inputs labeled A and B, one selection line (S0), and one output (Y), as shown in Fig. 2. The selection line determines which input is routed to the output.

Fig. 2 Diagrammatic illustration of the 2:1 multiplexer. Source: Rakesh Kumar, Ph.D.
Table 1: The truth table for a 2:1 multiplexer is given below
S0 | Y (Output) |
0 | A |
1 | B |
The output Y can be expressed as
Y= A. S0’ + B. S0
4:1 Multiplexer
A 4:1 multiplexer is a digital combinational circuit that has four input signals and forwards them to a single output line based on two selection lines. As shown in Fig. 3, it comprises four data input lines, A, B, C, and D, two select lines, S0 and S1, which route input, and one output line, Y.
Fig. 3 Diagrammatic illustration of the 4:1 multiplexer. Source: Rakesh Kumar, Ph.D.
Table 2: The truth table for a 4:1 multiplexer is given below
S1 | S0 | Y (Output) |
0 | 0 | A |
0 | 1 | B |
1 | 0 | C |
1 | 1 | D |
The output Y can be expressed as
Y=(S1’⋅S0’⋅A)+(S1’⋅S0⋅B)+(S1⋅S0’⋅C)+(S1⋅S0⋅D)
8:1 Multiplexer
An 8:1 multiplexer is a digital combinational circuit that selects one of eight input signals and forwards it to a single output line, based on three selection lines.
As shown in Fig. 4, it comprises 8 data input lines (A, B, C, D, E, F, G, H), three select lines (S2, S1, S0), and one output line (Y).
Fig. 4 Diagrammatic illustration of the 8:1 multiplexer. Source: Rakesh Kumar, Ph.D.
Table 3: The truth table for the 8:1 multiplexer is given below
S2 | S1 | S0 | Y (Output) |
0 | 0 | 0 | A |
0 | 0 | 1 | B |
0 | 1 | 0 | C |
0 | 1 | 1 | D |
1 | 0 | 0 | E |
1 | 0 | 1 | F |
1 | 1 | 0 | G |
1 | 1 | 1 | H |
The output Y can be written as
Y=(A.S2’.S1’.S0’)+(B.S2’.S1’.S0)+(C.S2’.S1.S0’)+(D.S2’.S1.S0)+(E.S2.S1’.S0’)+(F.S2.S1’.S0)+(G.S2.S1.S0’)+(H.S2.S1.S0)
Designing a Large Multiplexer Using a Small Multiplexer
Techniques like binary decision diagrams (BDD) are widely used for implementing logic functions using multiplexers, as MUXes can efficiently realize complex Boolean expressions.
As the number of inputs increases, larger multiplexers can be constructed by combining multiple smaller multiplexers in a hierarchical structure. This approach allows for building high-input multiplexers (such as 8:1, 16:1, or higher) using smaller 2:1 or 4:1 multiplexers.
● A 4:1 multiplexer can be constructed using three 2:1 multiplexers, as shown in Fig. 5.
● An 8:1 multiplexer can be constructed from two 4:1 multiplexers and one 2:1 multiplexer.
Fig. 5 Diagrammatic illustration of a 4:1 multiplexer that can be constructed using three 2:1 multiplexers. Source: MDPI
Applications
● Data Selection and Routing: It directs data from multiple sources to specific destinations. They function as digital switches, allowing systems to dynamically select which data path to use based on control signals.
● Time division multiplexing (TDM): They are used for TDM which is a common technique where each input signal is assigned a specific time slot, enabling multiple signals to share the same channel at different times.
● Operation sequencing: It allows designers to control the flow and order of data output through logic signals, making systems more flexible and adaptable.
● Parallel-to-Serial Conversion: It converts parallel data into serial format by sequentially selecting each bit from multiple input lines and transmitting them one after another through a single output line.
● Logic Function Implementation: They can implement any combinational logic function without needing specialized components, which simplifies circuit design and reduces hardware requirements.
● Waveform Generation: They can generate various waveforms by selecting different input signals at specific times.
Summarizing the Key Points
● A multiplexer is a digital circuit that selects one input from multiple lines based on selection lines, enabling efficient data transmission.
● Multiplexers come in various types, including 2:1, 4:1, and 8:1, based on the number of data inputs and selection lines.
● Key applications of multiplexers include data selection and routing, time division multiplexing, operation sequencing, and transforming parallel data into serial formats.
Reference
Almatrood, A., George, A. K., & Singh, H. (2021). Low-power multiplexer structures targeting efficient QCA nanotechnology circuit designs. Electronics, 10(16), 1885. https://doi.org/10.3390/electronics10161885
I Divya et al., Design of Low-Power High-Speed Multiplexers Using Reversible Logic Gates. International Journal of Research in Engineering, IT, and Social Sciences. https://www.indusedu.org/pdfs/IJREISS/IJREISS_3932_91769.pdf
Alharbi, M., Edwards, G., & Stocker, R. (2024). An ultra-energy-efficient reversible quantum-dot cellular automata 8:1 multiplexer circuit. Quantum Reports, 6(1), 41–57. https://doi.org/10.3390/quantum6010004
Majeed, A. H. (2021). An ultra-low complexity of 2:1 multiplexer block in QCA technology. Indonesian Journal of Electrical Engineering and Computer Science, 21(3), 1341. https://doi.org/10.11591/ijeecs.v21.i3.pp1341-1346
ALL ABOUT ELECTRONICS. (2022, April 6). Multiplexer Explained | Implementation of Boolean function using Multiplexer [Video]. YouTube. https://www.youtube.com/watch?v=aQlF-9i3fAA
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